Elixir M2F2G64CB8HA4N-CG Fiche technique télécharger pdf (Page 2)

M2F1G64CB88A4N / M2F2G64CB8HA4N

1GB: 128M x 64 / 2GB: 256M x 64

Unbuffered DDR3 SDRAM DIMM Preliminary

REV 0.1 2

06/2008

NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.

Ordering Information

Part Number

Speed

Organization

Leads

Power

Note

M2F1G64CB88A4N-BE

533MHz (1.875ns@ CL = 7)

DDR3-1066

PC3-8500

128Mx64

Gold

1.5V

M2F1G64CB88A4N-CG

667MHz (1.5ns@ CL = 9)

DDR3-1333

PC3-10660

M2F1G64CB88A4N-DG

800 MHz(1.25ns@ CL = 9)

DDR3-1600

PC3-12800

M2F2G64CB8HA4N-BE

533MHz (1.875ns@ CL = 7)

DDR3-1066

PC3-8500

256Mx64

M2F2G64CB8HA4N-CG

667MHz (1.5ns@ CL = 9)

DDR3-1333

PC3-10660

M2F2G64CB8HA4N-DG

800 MHz(1.25ns@ CL = 9)

DDR3-1600

PC3-12800

Pin Description

Pin Name

Description

Pin Name

Description

A0-A13

Address Inputs

SCL

Serial Presence Detect Clock Input

BA0–BA2

SDRAM Bank select

SDA

Serial Presence Detect Data input/output



Row Address Strobe

SA0-SA2

Serial Presence Detect Address Inputs



Column Address Strobe

SDRAM core power supply



Write Enable

DDQ

SDRAM I/O Driver power supply

, 

Chip Selects

REFDQ

SDRAM I/O reference supply

CKE0-CKE1

Clock Enable

REFCA

SDRAM command/address reference supply

ODT0-ODT1

On die termination control lines

Ground

DQ0-DQ63

Data input/output

DDSPD

Serial EEPROM positive power supply

DQS0-DQS7

-

SDRAM differential data strobes

No Connect

DM0-DM7

Input Data Mask/High Data Strobes

SDRAM I/O termination supply

CK0-CK1,

-

Differential Clock Inputs



Set DRAMs to Know State

Note: CK1,  , OTD1 and CKE1 are used for 2GB module only.

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Elixir M2F2G64CB8HA4N-CG Fiche technique Page 2

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